The present disclosure relates to a semiconductor device and is applicable to a semiconductor device including a level shift circuit for example.
The level shift circuit converts signal amplitude in each of circuits that operate with different supply voltages into the amplitude corresponding to each supply voltage. For example, in the miniaturized semiconductor integrated circuit, the supply voltage of a low voltage system is employed from the viewpoint of the reduced power consumption of the circuit and the reliability of an element. On the other hand, in an input/output circuit, which inputs and outputs a signal from and to an external circuit, the conventional supply voltage (the supply voltage of a high voltage system) is employed. Therefore, the level shift circuit is needed to convert the signal level in the power supply circuit of the low voltage system inside the integrated circuit into the signal level in the power supply circuit of the high voltage system. Japanese Unexamined Patent Application Publication No. Hei 8 (1996)-148988 (Patent Literature 1) discloses a technique in which basically, a load element, one conductivity type MOS transistor with a gate bias of about a half of a high voltage, a reverse conductivity type MOS transistor with a similar gate bias of about a half of the high voltage, and a reverse conductivity type MOS transistor with a gate supplied with a logic input of low amplitude are coupled in series in this order between the high voltage and GND, and voltages applied to gate layers of every MOS transistors are all reduced.